Various memory devices have asymmetric programming and erasing characteristics, that is, one of the operations either setting (programming) or resetting (erasing) performs better than the other. The better performance can include a faster speed, lower power consumption, lower current, lower voltage, higher yield, etc.
The setting and resetting operations are performed based on a change in resistance in the memory device. The performance of the change in resistance in the memory device is typically dependent upon the materials and structure of the memory device. For example, in a phase change memory device (PCM) the change in resistance is caused by a change of chalcogenide materials between crystalline and amorphous phases. The recrystallization process from amorphous phase to crystalline phase (set) is typically slower than the melting process from crystalline phase to amorphous phase (reset).
In another example, the resistance change in a spin-transfer-torque random-access-memory device (STTRAM) is the result of different orientation alignment (parallel or anti-parallel) of the magnetization direction of the top and bottom ferromagnetic electrodes. The change from parallel to anti-parallel requires higher switching current/power than that from anti-parallel to parallel. As can be appreciated various other non-volatile memory devices (e.g., resistive random-access memory devices (RRAM)) similarly display asymmetric switching characteristics.
Accordingly, it is desirable to take advantage of the operation (e.g., the reset operation or the set operation) that displays the better performance when storing data. Other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.